TRGSEL1=TRGSEL0, TRGEN1=DIS, TRGEN0=DIS, TRGSEL0=TRGSEL0, OSR1=OSR_1, OSR0=OSR_1
Trigger Register
| TRGEN0 | Trigger Enable of Channel 0 0 (DIS): External trigger mode disabled. DACC is in Free-running mode or Max speed mode. 1 (EN): External trigger mode enabled. |
| TRGEN1 | Trigger Enable of Channel 1 0 (DIS): External trigger mode disabled. DACC is in Free-running mode or Max speed mode. 1 (EN): External trigger mode enabled. |
| TRGSEL0 | Trigger Selection of Channel 0 0 (TRGSEL0): DAC External Trigger Input (DATRG) 1 (TRGSEL1): TC0 Channel 0 Output (TIOA0) 2 (TRGSEL2): TC0 Channel 1 Output (TIOA1) 3 (TRGSEL3): TC0 Channel 2 Output (TIOA2) 4 (TRGSEL4): PWM0 Event Line 0 5 (TRGSEL5): PWM0 Event Line 1 6 (TRGSEL6): PWM1 Event Line 0 7 (TRGSEL7): PWM1 Event Line 1 |
| TRGSEL1 | Trigger Selection of Channel 1 0 (TRGSEL0): DAC External Trigger Input (DATRG) 1 (TRGSEL1): TC0 Channel 0 Output (TIOA0) 2 (TRGSEL2): TC0 Channel 1 Output (TIOA1) 3 (TRGSEL3): TC0 Channel 2 Output (TIOA2) 4 (TRGSEL4): PWM0 Event Line 0 5 (TRGSEL5): PWM0 Event Line 1 6 (TRGSEL6): PWM1 Event Line 0 7 (TRGSEL7): PWM1 Event Line 1 |
| OSR0 | Over Sampling Ratio of Channel 0 0 (OSR_1): OSR = 1 1 (OSR_2): OSR = 2 2 (OSR_4): OSR = 4 3 (OSR_8): OSR = 8 4 (OSR_16): OSR = 16 5 (OSR_32): OSR = 32 |
| OSR1 | Over Sampling Ratio of Channel 1 0 (OSR_1): OSR = 1 1 (OSR_2): OSR = 2 2 (OSR_4): OSR = 4 3 (OSR_8): OSR = 8 4 (OSR_16): OSR = 16 5 (OSR_32): OSR = 32 |